1. Field of the Invention
The present invention relates to a method of fabricating a semiconductor device, by which interconnect trenches and viaholes are formed using the three-layered resist process.
2. Related Art
With advancement in micronization of semiconductor devices, there are increasing demands on micro-fabrication in etching technology using photoresist. The three-layered resist process is known as a method allowing micro-fabrication unsusceptible to step difference on substrates. In the three-layered resist process, first, a thick lower resist film is coated on a substrate to be micro-fabricated. Next, SOG (spin-on-glass) is coated on the lower resist film to thereby form an intermediate film. Further thereon, an upper resist film is coated, the upper resist film is subjected to light exposure, and developed to thereby obtain a mask used for the processing (Japanese Laid-Open Patent Publication No. H5-341533).
When any misalignment should occur, it is general to peel off or remove only the upper resist film by O2 ashing or by using an organic solvent, and to form the upper resist film again, which is followed by light exposure and development. The removal of the upper resist film using an organic solvent has, however, also resulted in peeling off of SOG composing the intermediate film. Japanese Laid-Open Patent Publication No. H5-341533 also discloses a technique of using a low concentration resolution resist, in order to make only the upper resist film more readily removable.
Japanese Laid-Open Patent Publication No. H7-183194 discloses a technique of using a SiO2 film formed by the low-temperature, high-density-plasma CVD process as the intermediate film of the three-layered resist, in order to improve critical dimension loss during etching of the lower resist film, and to improve geometry of the pattern.
The conventional peeling off and removal of the upper resist film by O2 ashing has been known to promote bonding of C and O in SOG during the ashing, and to readily destruct Si—CH3 bonds. Portions where the Si—CH3 bonds were destructed generate dangling bonds of Si, and this undesirably increases hygroscopicity of the SOG layer. Such moisture absorption of the underlying SOG modifies film properties thereof, and this consequently alters light exposure conditions for the upper resist film, and results in pattern failure. For this reason, it has been believed as being difficult to peel off and remove only the upper resist film and to re-build it in the three-layered resist technique using SOG, and as being poor in the mass productivity.
An SiO2 film formed by using SiH4 gas and N2O gas, as described in Japanese Laid-Open Patent Publication No. H7-183194, has been found to be unsatisfactory in the ashing resistance as will be described later in Examples.